Tags

Tags give the ability to mark specific points in history as being important

FINAL-SUBMISSION

de086fce · uploaded final bin file into final-submission directory · Sep 30, 2023
```
Everything is ready for grading.
```

5935e774 · Fix interconnect REN/WEN behavior. · Sep 22, 2023

Fixed the interconnect's REN/WEN signals and produced the Interconnect-fix.bit bitfile.

presentation-version

81acdc29 · Reduce DRAM size to fulfill timing requirements. · Jul 16, 2023

Contains the bitfiles used during our presentation.
WARNING: Buffer VHDL source still uses DRAM_SIZE=16 and fails timing constraints! The bitfile correctly uses DRAM_SIZE=8.

RMII-functional

ead7ca52 · Merge branch 'main' of git.tu-berlin.de:aep-network-switch/layer-2-network-switch · Jul 14, 2023
```
RMII interface is functional, loopback configuration tested in Wireshark.
```